Intel Corp. (Santa Clara, CA, U.S.), the world's largest maker of semiconductors, says it has built test chips using next-generation 65 nanometer technology and expects to be the first to produce them in 2005.
The demonstration chips compare to 90-nanometer chips slated to be shipping in volume early next year and 130-nanometer chips that are currently in wide use. One nanometer is one-billionth of a meter.
The smaller the circuitry, the more transistors can be packed into a chip for more functionality and better performance.
The 65-nanometer process will enable Intel to double the number of transistors it can put on a single chip from today's chips, the company said.
The transistors on the Static Random Access Memory (SRAM) test chips are so small that 10 million of them would fit in 1 sq mm, roughly the size of the top of a ball point pen, according to the company.
Intel does not make SRAM chips, but chose them for the test chips because they use similar process elements as microprocessors, which perform the computing functions in PCs and other devices, said Mark Bohr, director of Process Architecture and Integration at Intel. (Reuters)
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