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Texas Instruments Making Moves in Mobile Chips
Mar 24, 2004
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Texas Instruments Inc. (TI) is the latest chipmaker to announce plans to manufacture chips using a process that creates structures that are even smaller than the already tiny transistors on processors in current personal computers (PCs) and mobile devices.

The company said it has already created 4M-bit test SRAM arrays based on the 65 nm manufacturing process and plans to sample a wireless product built with the new process in the first quarter of 2005, with manufacturing in late 2005.

The new chips will be half the size of 90 nm designs and pack 40 percent greater transistor performance, according to TI.

If the Dallas, TX, U.S.-based chipmaker lives up to its promise, it will align with Moore's Law, which predicts that the number of transistors per square inch of chip will double about every 2 years.

The transition from 90 nm to 65 nm should be easier than the jump from 130 nm to 90 nm, which the company made in 2003, TI spokesman Gary Silcott said.

"With 90 nm we introduced the low-k dielectric material, but with 65 nm there's not as much new innovation in terms of new materials being introduced," Mr. Silcott said. "We look at this step as evolutionary rather than revolutionary."

He said the biggest challenge in moving to the 650-nm level is power management. As more and more transistors are put onto a single chip, generating more and more heat, keeping power consumption low becomes a key concern.

"When you move to 65 nm, transistors get smaller, materials get thinner, so you run up against what is called leakage," Mr. Silcott said. "Even when transistors are off, they have a current that leaks through them."

TI said new technology in its 65-nm chips will reduce this leakage by 1,000 times. One of the most unique qualities of the technology is its ability to "automatically scale power supply volume to as low as possible when users don't need highest performance, and as users demand it boosts it up again," Mr. Silcott said.

TI plans to offer three versions of its 65-nm chips: a low-power, lower-speed version geared for battery-powered wireless portable devices; a midlevel version that offers more speed, for application-specific products such as DSPs; and a high-speed, microprocessor-class version for Sun Microsystems Inc. servers.

Mr. Silcott said multigate transistors won't be on the horizon for 65 nm technologies. "We're looking at that for 45 nm, or beyond," he said. "45 nm is expected to have some new material, potentially metal gates. ... It will definitely be interesting."

Intel Corp., of Santa Clara, CA, U.S., last fall demonstrated 65-nm SRAM chips and announced plans to manufacture chips based on the 65nm process in 2005. International Business Machines (IBM) is also on the 65-nm wagon. The Armonk, NY, U.S., company last summer entered into a multiyear agreement with Infineon Technologies AG and Chartered Semiconductor Manufacturing to speed up the process of 65-nm chip development. IBM previously teamed up with Advanced Micro Devices Inc. to develop 65-nm and 45-nm chip technologies on 300-mm silicon wafers. (eweek.com)

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