The Flip Chip assemblies have
proved to yield at least comparable reliability as standard surface mount
technology (SMT) packages—standard
packages as opposed to through-hole packages—with a reduced package
footprint or product volume resp., meaning a reduction of footprint
and/or volume is possible when using Flip Chip technology. To achieve
this reliability, it is necessary to carefully select the materials
and the process parameters.
At Fraunhofer IZM (Institute for Zuverlässigkeit [Reliability]
and Microintegra-tion) previous investigations on processibility and
reliability have been updated using state-of-the-art Flip Chip Underfillers.
Motivation for the investigations is that for industrial use it is
necessary to have defined encapsulation process parameters that guarantee
a robust process without internal flaws. As these flaws often result
from non-optimized material parameters, an easy way to detect critical
material combinations or assembly geometry was investigated. The investigations
performed correlate calculated flow rates to results from in-situ flow
measurements. Here the direct-flow visualization using video equipment
(i.e., flow-front fingering) was combined with acousto-microscopic
visualization of material inhomogeneities (i.e., comet-like filler
agglomerations). Furthermore, the influence of different substrate-base
materials, solder-mask types, and geometries on five different underfill
materials is considered and related to material flow and filler agglomerations
as detected and visualized by acoustic microscopy. For further material
evaluation concerning the reliability of the selected material systems,
accelerated aging tests are performed. During process setup and accelerated
aging tests, the use of Acoustic Microscopy allowed the precise detection
of material imperfections as variations in filler distribution or voiding.
As these internal flaws are critical to Flip Chip reliability, it is
crucial to avoid such effects.
Derived from these investigations, a material ranking of the underfillers
used was done, and material systems suited for the assembly of reliable
Flip Chip packages have been identified.
Flip Chip technology has found increasing acceptance in electronics
industry in the last years. At the same time, it became clear that
the semiconductor and packaging roadmaps hold challenges for this technology
. Device sizes and interconnection densities continue to increase
together with a growing demand for decreasing packaging costs and higher
throughput. But large dies, finest pitches, and vias under the die
impede the application of cost-effective flip-chip processes [2, 3,
4]. The enabling technology has to fulfill the following contradictory
demands: high yield, high throughput, low cost, suitability for large
integrated controllers (ICs), fine pitch, and insensitivity to PCB
Though there are technology alternatives as molded underfill or reflowable
underfill, the classic capillary-flow underfill still has a potential
for future applications. The main advantages of capillary flow underfiller
are as follows:
the relative ease of processing, suited for small-scale production
with manual equipment as well as high-volume manufacturing using fully
the flexibility of the underfilling process allowing fast adaptation
to layout changes; and
the compatibility with standard eutectic PbSn solders and also with
lead-free solders such as AgSn, that need increased reflow temperatures
of about 260°C.
To further improve the capillary flow underfillers, material suppliers
constantly modify their products to allow faster processing, the encapsulation
of larger devices >15 by 15 mm, or of devices with smallest gaps
less than 40 µm, and that yield increased reliability. The main
parameters used to do this are the use of improved resin/ hardener
systems with minimum reaction time and low viscosity  and the smallest
filler particles  to decrease viscosity and simultaneously keep
the CTE mismatch between chip, underfiller, and substrate low.
For the investigations described in this paper, five state-of-the art
underfill materials have been chosen and tested concerning their processibility
and reliability to provide the reader with information on the potential
of advanced capillary flow underfillers.
To understand what is happening during the underfilling process, it
is helpful to take a closer look at the flow behavior of liquids in
a capillary. It has been shown that the flow distance L between parallel
plates can be calculated using the following formula [7, 8]:
where h = Gap Height
t = Flow Time
f = Coeff. of Planar Penetration
The coefficient of planar penetration CPP is a material-specific parameter
that can be described as:
= Substrate Surface Energy
cos q = Underfiller Wetting Angle
h = Underfiller Viscosity
By simply determining the CPP using a flow module, i.e. parallel plates
with a defined gap height and materials identical to the assembly of
interest, the flow length for any assembly with these materials may
be calculated using formula (1). The CPP was introduced to allow the
determination of a material specific parameter indicating the suitability
for the underfilling process: typical values for underfilling materials
have been determined to values between 15 mm/s and 47 mm/s in a previous
However, it is necessary to keep in mind that some restrictions do
apply to this simple model. Major effects that complicate underfiller
flow calculations include the following: Underfiller Gelation, Gap/
Surface Variation, Filler/Filler Interaction, and Filler/Wall Interaction.
Analytical Methods for Material
Characterization. For material analysis
during the project, a wide variety of methods was used. Rheological
investigations, thermo-mechanical analysis, humidity absorption, and
thermal conductivity testing have been used for material characterization.
Empirical Test Method/Flip
Chip Test Vehicle. To approximate the flow
behavior of underfiller in Flip Chip cavities, the travel distance
in gaps between parallel glass slides versus time is monitored. For
this purpose, flow modules have been set up using a glass cover plate
glued to a substrate. The adhesive contains spacer particles, whose
diameter defines the flow module gap.
To determine underfiller flow behavior, the flow modules were brought
to process temperatures typically between 70°C and 95°C, and
a reservoir of underfiller was dispensed at one side of the module.
The travel distance of underfill between the parallel glass slides
and glass/substrate is recorded versus time using a video camera. After
cure, the flow modules are investigated by acoustic microscopy and
by cross sectioning.
For evaluation of the Flip Chip underfillers, a specially designed
test vehicle has been used. This test vehicle is based on FR4 substrate
and has six spaces for the placement of 10- by 10-mm Flip Chips. The
Flip Chip dies were peripherally bumped with pitches of 300 µm.
Test structure used for contact integrity testing was a daisy chain
pattern. In combination with the test adapter, the daisy chain resistance
could be checked simultaneously, allowing fast and efficient module
testing. The solder used in the board layout was eutectic. PbSn on
an electroless Ni UBM. The bump diameter prior to assembly was ca.
100 µm, after assembly the resulting bump height was ca.
80 µm. The resulting gap depended on the solder mask thickness.
The flux used for assembly was a state of the art no clean flux, reflow
was performed under N2 Atmosphere with a peak temperature of 230°C.
Reliability Analysis. For assembly reliability, evaluation standard
tests were performed and analyzed by the following non-destructive
and destructive techniques:
Popcorning Test (JEDEC
020) Level 1: 168-h storage at 85°C/85-percent
relative humidity and 3x reflow with a peak temperature of 240°C.
Pressure Cooker Storage: 121°C/100-percent relative humidity/2
Thermal Cycling (MIL STD
883e): -40 °C/+125 °C with 30-min
Table 1 - Material Properties of Flip Chip Underfillers
Used. CLICK for a full-size image.
detailed material analysis was performed to evaluate the material
properties concerning thermo-mechanical behavior and processibility.
Material data obtained from manufacturers and data determined at IZM
are summarized in Table 1.
Material A is a medium-viscosity underfiller (0.59 Pa*s @ 70°C) showing medium
surface tension of 33 mN/m. The material has a high filler content of ~70 wt%,
and maximum filler particle size is 12 µm, the second highest in the
test field. Thermo-mechanically, the material is rather stiff showing a Young’s
modulus of 10 GPa and has a low CTE of 26 ppm/K that is close to that of the
Material B shows a similar viscosity as Material A (0.61 Pa*s @ 70°C) and
a similar surface tension of 39 mN/m. The material has a medium filler content
of 62 wt%, and maximum filler particle size of 15 µm is the highest in
the test field. Thermo-mechanically, the material is also stiff with a Young’s
modulus of 7.6 GPa, though softer than Material A. It has a low CTE of 28 ppm/K
and also is close to that of the solder used.
Material C is a low-viscosity as is Material A (0.19 Pa*s @ 70°C) and has
a surface tension of 40 mN/m, comparable to Material B. Material C has a low
filler content of 40 wt%, and the maximum filler particle size of 10 µm
is medium. Thermo-mechanically, the material is rather soft with a Young’s
modulus of 2.8 GPa; CTE is high with 40 ppm/K. Material C has the highest humidity
uptake amongst the materials analyzed, at least doubling the values for the other
materials. No correlation between humidity desorption of 1.77 wt% and the content
of inert filler of the material was found (e.g., Material E with a similar filler
content does shows 0.83 wt% humidity uptake). It is thus assumed that this effect
can be correlated with the underfiller chemical composition, but as the material
recipes are proprietary, this point cannot be clarified.
Material D shows the highest viscosity of the materials investigated (0.73 Pa*s
@ 70°C) and the lowest surface tension of 32 mN/m. The material has the highest
filler content of 70 wt%, and the maximum filler particle size of 8 µm
is rather small. Thermo-mechanically, the material is as stiff as Material A
with a Young’s modulus of 10 GPa. Due to its high filler content, it has
a low CTE of 23 ppm/K, ideally matched with eutectic PbSn solder CTE.
Material E shows the lowest viscosity in the test field (0.04 Pa*s @ 70°C)
and the highest surface tension of 44 mN/m. Material E also has the lowest filler
content of 30 wt% and the lowest maximum filler particle size of 5 µm.
Thermo-mechanically, the material is rather soft with a Young’s modulus
of 3.5 Gpa. CTE is as high as Material C’s with 40 ppm/K. Material E shows
the highest CPP of 244 mm/s all the materials tested. This value is five
times the value of Material C, showing the next largest value of 48 mm/s.
The extreme increase of the CPP can be correlated to the extraordinarily low
viscosity of the material. The value of 0.04 Pa*s is also five times smaller
than that of Material C with a viscosity of 0.19 Pa*s. As shown in formula (2),
the CPP is reciprocally proportional to the viscosity. With the other properties
basically similar to the other underfills, the viscosity plays the major role
as far as flowability is concerned.
Nevertheless, it must be noted that the CPP is not the only parameter to determine
underfill processability: the proneness toward filler agglomeration is another
key parameter that can only be determined empirically.
Three different solder mask materials have been chosen for the test program to
identify their influence on material processing and reliability. Table 2 lists
the geometrical data, and information on surface energy and surface roughness.
Solder mask roughness values have been determined using atomic force microscopy
to investigate the potential influence of surface roughness on the wetting behavior
of the underfillers, possibly supporting underfiller flow by the wicking effect
known from textile wetting. As it was found that the surface of all materials
is comparably smooth, it is assumed that there is no wicking effect present with
Table 2 - Solder Mask Properties. CLICK for
a full-size image.
The surface energy was determined using the sessile drop method initially
and after a reflow process step. Though the materials showed a strong variation
surface energy in initial state, it was found that the surface changes during
the reflow process decrease surface energy to a similar level. It is thus assumed
that the influence of the solder mask is not as important as the solder mask
topography. Concerning geometry, it was found that solder mask material SM
1 had 2.5 to 3 times the thickness of the other materials. With a given distance
from substrate surface to die surface of 80 µm, the Flip Chip gap
can be calculated by subtracting the solder mask thickness. Result is a narrowing
of the Flip Chip gap from ca 65 µm for SM 2 and ca 60 µm
for SM 3 down to only 30 µm for SM 1, impeding underfiller
flow (see Formula 1).
A test matrix of five capillary flow underfill materials and three solder-mask
materials have been analyzed using analytical as well as empirical tools. Valuable
data have been determined to estimate material behavior during processing and
During flowability testing, Materials C and E show good performance, characterized
by even and fast flow. Materials A and B were fair concerning processibility,
and Material D showed only poor processing behavior. These results correlate
with the CPP that has been calculated from analytically determined material parameters.
Filler agglomerations were detected with Materials A, B, and D, causing in some
cases air voiding. Materials C and E did not show agglomerations. Cross sectioning
through not agglomerated areas showed that filler settling does not occur with
state-of-the art materials. So it is assumed that the formation of a two-layer
structure with a non-filled area on top and a highly filled area on the bottom
is prevented by optimized filler processing concerning size and coating.
During reliability testing, all materials did fulfill the criteria of the Jedec
Std. 20 LVL 3 conditions. In pressure cooker testing, only Material A showed
good performance. Materials A, B, and D performed fair, but Material C performed
poor. During thermal cycling for all the materials tested, material combinations
were found that did not show electrical failures until 2,000 cycles from -40°C
to +125°C, though the degree of delamination varied for the different materials.
A strong dependency of assembly reliability to the material of the solder mask
was found, possibly being dependent on the thermo-mechanical stresses present
at a four-layer geometry of substrate/solder mask/underfiller/chip. This is especially
true for solder mask SM 1, where the thickness of ca 50 µm is dominating
over a small Flip Chip layer of only 30 µm. This effect has been described
by Schubert et. al. inn . Derived from the experiences of this study, it
is recommended to minimize the thickness of a solder mask layer to a minimum,
reducing the thermo-mechanical influence and maximizing the Flip Chip gap for
As a result of the material test run Material E, the high CPP material showed
good processibility, as well as good reliability, and set a standard for future
underfill materials. The recommendation for underfill material selection derived
from this study and from previous work  is to perform a preselection of the
materials related to underfiller viscosity and the thermo-mechanical properties
of the material.
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This is an edited version of a paper that was originally presented at the IPC
Surface Mount Equipment Manufacturers Association Council APEX® at the Anaheim
Convention Center in Anaheim, CA, U.S. The paper was awarded the “Martin
L. Barton International Paper Award,” named for former APEX Technical Conference
Director Martin Barton.