While directly applicable to networking equipment, the CY22180 can also be used in advanced consumer electronics applications such as HDTV and DVR that need to connect to a computer for management or content transfer.
Cypress Semiconductor Corp. has introduced a single-chip programmable clock generator that gives engineers the ability to quickly synthesize a low-jitter clock at the frequency of their choice. According to the San Jose, CA, U.S.–based company, its CY22180 clock offers a low period and cycle-to-cycle jitter output of below 75 picoseconds for its entire output frequency range, reaching as low as 60 picoseconds for the most commonly used frequencies. This allows the device to deliver the precision clocking required by networking equipment such as routers and switches, as well as by consumer, communication, and industrial applications.
Kelly Maas, senior staff applications engineer, says the key behind the new clock is advanced complementary metal oxide semiconductor (CMOS) nonvolatile technology. “The use of the nonvolatile memory allows the part to be programmed to any frequency between 20 and 200 MHz,” he explains. “This enables samples to be generated very quickly, which makes it practical for the end-product engineer to optimize a system by fine-tuning the clock frequency. In addition, the engineer can determine the amount of margin in the system by using a clock at a higher or lower frequency than the nominal value.”
All of the components in the signal path are optimized for low jitter, including the phase-locked loop (PLL), the crystal oscillator, the output path, dividers, and output drivers. “The benefit to the engineer is that the clock signal is more precise, providing more timing margin in the system,” Maas says. “The increase in timing margin leads to better quality, higher performance, and lower-cost products.”
Cypress says this is the first clock of its kind. While there are a few other clock generators on the market with low jitter, Maas says they are fixed-function devices, meaning that the frequency multiplier value is fixed. As a result, they tend to be application-specific.
Most programmable clock generators focus on increased flexibility or number of outputs while sacrificing jitter performance. “The CY22180 starts with a programmable technology, then applies careful noise-reduction design techniques to be the first product to intersect these two previously separate categories,” Maas explains.
One of the main challenges in creating the new clock was designing the PLL and output signal path to have good noise rejection. According to Maas, this was achieved by using on-chip power supply filtering and differential circuits that inherently have good power supply rejection. In addition, all of the critical signals that are used to generate the clock frequency are isolated through shielding to prevent crosstalk from other switching sources.